justhomework/Quartus/v6/jyh_4490_6_entry.v

module jyh_4490_6_entry(code,			seg,			clk_50m,		en,		in,
							//数码管型码 		数码管位码    50M			使能信号	按键
								out0,			subclk);
							//计数值 			消抖值

output [6:0] code;
output [7:0] seg;
input  en,clk_50m,in;
output subclk;
output [3:0] out0;


wire freshclk;

reg upd;

initial begin
upd=1;
end

//分频器
jyh_4490_6_divider D1(
.clk(clk_50m),
.clk_out(freshclk)
);

//个位计数器
jyh_4490_6_counter C1(
.Q(out0),
.clk(subclk),
.en(en),
.upd(upd));

//四位数码管译码器
jyh_4490_4_encoder E1(
.codeout(code),
.d1(out0),
.clk(freshclk),
.sel(seg[3:0])
);

//消抖模块
jyh_4490_mstate M1(
.clk(clk_50m),
.in(in),
.en(en),
.out(subclk)
);
endmodule