diff --git a/Quartus/v4/Waveform.vwf b/Quartus/v4/Waveform.vwf index d5dbc00..d6b4563 100644 --- a/Quartus/v4/Waveform.vwf +++ b/Quartus/v4/Waveform.vwf @@ -20,13 +20,6 @@ proc simTimestamp {} { after 2500 simTimestamp run -all quit -f - - - - - - - onerror {exit -code 1} vlib work @@ -45,13 +38,6 @@ proc simTimestamp {} { after 2500 simTimestamp run -all quit -f - - - - - - - verilog */ @@ -110,6 +96,16 @@ SIGNAL("clk") PARENT = ""; } +SIGNAL("clk_50m") +{ + VALUE_TYPE = NINE_LEVEL_BIT; + SIGNAL_TYPE = SINGLE_BIT; + WIDTH = 1; + LSB_INDEX = -1; + DIRECTION = INPUT; + PARENT = ""; +} + SIGNAL("clr") { VALUE_TYPE = NINE_LEVEL_BIT; @@ -420,36 +416,6 @@ SIGNAL("out1[0]") PARENT = "out1"; } -SIGNAL("upd") -{ - VALUE_TYPE = NINE_LEVEL_BIT; - SIGNAL_TYPE = SINGLE_BIT; - WIDTH = 1; - LSB_INDEX = -1; - DIRECTION = INPUT; - PARENT = ""; -} - -SIGNAL("subclk") -{ - VALUE_TYPE = NINE_LEVEL_BIT; - SIGNAL_TYPE = SINGLE_BIT; - WIDTH = 1; - LSB_INDEX = -1; - DIRECTION = OUTPUT; - PARENT = ""; -} - -SIGNAL("clk_50m") -{ - VALUE_TYPE = NINE_LEVEL_BIT; - SIGNAL_TYPE = SINGLE_BIT; - WIDTH = 1; - LSB_INDEX = -1; - DIRECTION = INPUT; - PARENT = ""; -} - SIGNAL("seg") { VALUE_TYPE = NINE_LEVEL_BIT; @@ -540,6 +506,26 @@ SIGNAL("seg[0]") PARENT = "seg"; } +SIGNAL("subclk") +{ + VALUE_TYPE = NINE_LEVEL_BIT; + SIGNAL_TYPE = SINGLE_BIT; + WIDTH = 1; + LSB_INDEX = -1; + DIRECTION = OUTPUT; + PARENT = ""; +} + +SIGNAL("upd") +{ + VALUE_TYPE = NINE_LEVEL_BIT; + SIGNAL_TYPE = SINGLE_BIT; + WIDTH = 1; + LSB_INDEX = -1; + DIRECTION = INPUT; + PARENT = ""; +} + TRANSITION_LIST("CO") { NODE @@ -556,9 +542,23 @@ TRANSITION_LIST("clk") REPEAT = 1; NODE { - REPEAT = 50; - LEVEL 0 FOR 10.0; - LEVEL 1 FOR 10.0; + REPEAT = 100; + LEVEL 0 FOR 5.0; + LEVEL 1 FOR 5.0; + } + } +} + +TRANSITION_LIST("clk_50m") +{ + NODE + { + REPEAT = 1; + NODE + { + REPEAT = 100; + LEVEL 0 FOR 5.0; + LEVEL 1 FOR 5.0; } } } @@ -568,9 +568,7 @@ TRANSITION_LIST("clr") NODE { REPEAT = 1; - LEVEL 1 FOR 580.0; - LEVEL 0 FOR 40.0; - LEVEL 1 FOR 380.0; + LEVEL 1 FOR 1000.0; } } @@ -642,8 +640,7 @@ TRANSITION_LIST("en") NODE { REPEAT = 1; - LEVEL 0 FOR 40.0; - LEVEL 1 FOR 960.0; + LEVEL 1 FOR 1000.0; } } @@ -661,7 +658,7 @@ TRANSITION_LIST("in0[2]") NODE { REPEAT = 1; - LEVEL 1 FOR 1000.0; + LEVEL 0 FOR 1000.0; } } @@ -679,7 +676,7 @@ TRANSITION_LIST("in0[0]") NODE { REPEAT = 1; - LEVEL 1 FOR 1000.0; + LEVEL 0 FOR 1000.0; } } @@ -697,7 +694,7 @@ TRANSITION_LIST("in1[2]") NODE { REPEAT = 1; - LEVEL 1 FOR 1000.0; + LEVEL 0 FOR 1000.0; } } @@ -706,7 +703,7 @@ TRANSITION_LIST("in1[1]") NODE { REPEAT = 1; - LEVEL 1 FOR 1000.0; + LEVEL 0 FOR 1000.0; } } @@ -724,9 +721,7 @@ TRANSITION_LIST("load") NODE { REPEAT = 1; - LEVEL 0 FOR 480.0; - LEVEL 1 FOR 30.0; - LEVEL 0 FOR 490.0; + LEVEL 0 FOR 1000.0; } } @@ -802,39 +797,6 @@ TRANSITION_LIST("out1[0]") } } -TRANSITION_LIST("upd") -{ - NODE - { - REPEAT = 1; - LEVEL 0 FOR 500.0; - LEVEL 1 FOR 500.0; - } -} - -TRANSITION_LIST("subclk") -{ - NODE - { - REPEAT = 1; - LEVEL X FOR 1000.0; - } -} - -TRANSITION_LIST("clk_50m") -{ - NODE - { - REPEAT = 1; - NODE - { - REPEAT = 200; - LEVEL 0 FOR 2.5; - LEVEL 1 FOR 2.5; - } - } -} - TRANSITION_LIST("seg[7]") { NODE @@ -907,9 +869,27 @@ TRANSITION_LIST("seg[0]") } } +TRANSITION_LIST("subclk") +{ + NODE + { + REPEAT = 1; + LEVEL X FOR 1000.0; + } +} + +TRANSITION_LIST("upd") +{ + NODE + { + REPEAT = 1; + LEVEL 0 FOR 1000.0; + } +} + DISPLAY_LINE { - CHANNEL = "clk"; + CHANNEL = "CO"; EXPAND_STATUS = COLLAPSED; RADIX = Binary; TREE_INDEX = 0; @@ -918,7 +898,7 @@ DISPLAY_LINE DISPLAY_LINE { - CHANNEL = "clk_50m"; + CHANNEL = "clk"; EXPAND_STATUS = COLLAPSED; RADIX = Binary; TREE_INDEX = 1; @@ -927,347 +907,30 @@ DISPLAY_LINE DISPLAY_LINE { - CHANNEL = "subclk"; + CHANNEL = "clk_50m"; EXPAND_STATUS = COLLAPSED; RADIX = Binary; TREE_INDEX = 2; TREE_LEVEL = 0; } -DISPLAY_LINE -{ - CHANNEL = "in0"; - EXPAND_STATUS = COLLAPSED; - RADIX = Unsigned; - TREE_INDEX = 3; - TREE_LEVEL = 0; - CHILDREN = 4, 5, 6, 7; -} - -DISPLAY_LINE -{ - CHANNEL = "in0[3]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Unsigned; - TREE_INDEX = 4; - TREE_LEVEL = 1; - PARENT = 3; -} - -DISPLAY_LINE -{ - CHANNEL = "in0[2]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Unsigned; - TREE_INDEX = 5; - TREE_LEVEL = 1; - PARENT = 3; -} - -DISPLAY_LINE -{ - CHANNEL = "in0[1]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Unsigned; - TREE_INDEX = 6; - TREE_LEVEL = 1; - PARENT = 3; -} - -DISPLAY_LINE -{ - CHANNEL = "in0[0]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Unsigned; - TREE_INDEX = 7; - TREE_LEVEL = 1; - PARENT = 3; -} - -DISPLAY_LINE -{ - CHANNEL = "in1"; - EXPAND_STATUS = COLLAPSED; - RADIX = Signed; - TREE_INDEX = 8; - TREE_LEVEL = 0; - CHILDREN = 9, 10, 11, 12; -} - -DISPLAY_LINE -{ - CHANNEL = "in1[3]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Signed; - TREE_INDEX = 9; - TREE_LEVEL = 1; - PARENT = 8; -} - -DISPLAY_LINE -{ - CHANNEL = "in1[2]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Signed; - TREE_INDEX = 10; - TREE_LEVEL = 1; - PARENT = 8; -} - -DISPLAY_LINE -{ - CHANNEL = "in1[1]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Signed; - TREE_INDEX = 11; - TREE_LEVEL = 1; - PARENT = 8; -} - -DISPLAY_LINE -{ - CHANNEL = "in1[0]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Signed; - TREE_INDEX = 12; - TREE_LEVEL = 1; - PARENT = 8; -} - DISPLAY_LINE { CHANNEL = "clr"; EXPAND_STATUS = COLLAPSED; RADIX = Binary; - TREE_INDEX = 13; + TREE_INDEX = 3; TREE_LEVEL = 0; } -DISPLAY_LINE -{ - CHANNEL = "load"; - EXPAND_STATUS = COLLAPSED; - RADIX = Binary; - TREE_INDEX = 14; - TREE_LEVEL = 0; -} - -DISPLAY_LINE -{ - CHANNEL = "en"; - EXPAND_STATUS = COLLAPSED; - RADIX = Binary; - TREE_INDEX = 15; - TREE_LEVEL = 0; -} - -DISPLAY_LINE -{ - CHANNEL = "CO"; - EXPAND_STATUS = COLLAPSED; - RADIX = Binary; - TREE_INDEX = 16; - TREE_LEVEL = 0; -} - -DISPLAY_LINE -{ - CHANNEL = "seg"; - EXPAND_STATUS = COLLAPSED; - RADIX = Binary; - TREE_INDEX = 17; - TREE_LEVEL = 0; - CHILDREN = 18, 19, 20, 21, 22, 23, 24, 25; -} - -DISPLAY_LINE -{ - CHANNEL = "seg[7]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Binary; - TREE_INDEX = 18; - TREE_LEVEL = 1; - PARENT = 17; -} - -DISPLAY_LINE -{ - CHANNEL = "seg[6]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Binary; - TREE_INDEX = 19; - TREE_LEVEL = 1; - PARENT = 17; -} - -DISPLAY_LINE -{ - CHANNEL = "seg[5]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Binary; - TREE_INDEX = 20; - TREE_LEVEL = 1; - PARENT = 17; -} - -DISPLAY_LINE -{ - CHANNEL = "seg[4]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Binary; - TREE_INDEX = 21; - TREE_LEVEL = 1; - PARENT = 17; -} - -DISPLAY_LINE -{ - CHANNEL = "seg[3]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Binary; - TREE_INDEX = 22; - TREE_LEVEL = 1; - PARENT = 17; -} - -DISPLAY_LINE -{ - CHANNEL = "seg[2]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Binary; - TREE_INDEX = 23; - TREE_LEVEL = 1; - PARENT = 17; -} - -DISPLAY_LINE -{ - CHANNEL = "seg[1]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Binary; - TREE_INDEX = 24; - TREE_LEVEL = 1; - PARENT = 17; -} - -DISPLAY_LINE -{ - CHANNEL = "seg[0]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Binary; - TREE_INDEX = 25; - TREE_LEVEL = 1; - PARENT = 17; -} - -DISPLAY_LINE -{ - CHANNEL = "out0"; - EXPAND_STATUS = COLLAPSED; - RADIX = Unsigned; - TREE_INDEX = 26; - TREE_LEVEL = 0; - CHILDREN = 27, 28, 29, 30; -} - -DISPLAY_LINE -{ - CHANNEL = "out0[3]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Unsigned; - TREE_INDEX = 27; - TREE_LEVEL = 1; - PARENT = 26; -} - -DISPLAY_LINE -{ - CHANNEL = "out0[2]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Unsigned; - TREE_INDEX = 28; - TREE_LEVEL = 1; - PARENT = 26; -} - -DISPLAY_LINE -{ - CHANNEL = "out0[1]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Unsigned; - TREE_INDEX = 29; - TREE_LEVEL = 1; - PARENT = 26; -} - -DISPLAY_LINE -{ - CHANNEL = "out0[0]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Unsigned; - TREE_INDEX = 30; - TREE_LEVEL = 1; - PARENT = 26; -} - -DISPLAY_LINE -{ - CHANNEL = "out1"; - EXPAND_STATUS = COLLAPSED; - RADIX = Unsigned; - TREE_INDEX = 31; - TREE_LEVEL = 0; - CHILDREN = 32, 33, 34, 35; -} - -DISPLAY_LINE -{ - CHANNEL = "out1[3]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Unsigned; - TREE_INDEX = 32; - TREE_LEVEL = 1; - PARENT = 31; -} - -DISPLAY_LINE -{ - CHANNEL = "out1[2]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Unsigned; - TREE_INDEX = 33; - TREE_LEVEL = 1; - PARENT = 31; -} - -DISPLAY_LINE -{ - CHANNEL = "out1[1]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Unsigned; - TREE_INDEX = 34; - TREE_LEVEL = 1; - PARENT = 31; -} - -DISPLAY_LINE -{ - CHANNEL = "out1[0]"; - EXPAND_STATUS = COLLAPSED; - RADIX = Unsigned; - TREE_INDEX = 35; - TREE_LEVEL = 1; - PARENT = 31; -} - DISPLAY_LINE { CHANNEL = "code"; EXPAND_STATUS = COLLAPSED; RADIX = Binary; - TREE_INDEX = 36; + TREE_INDEX = 4; TREE_LEVEL = 0; - CHILDREN = 37, 38, 39, 40, 41, 42, 43; + CHILDREN = 5, 6, 7, 8, 9, 10, 11; } DISPLAY_LINE @@ -1275,9 +938,9 @@ DISPLAY_LINE CHANNEL = "code[6]"; EXPAND_STATUS = COLLAPSED; RADIX = Binary; - TREE_INDEX = 37; + TREE_INDEX = 5; TREE_LEVEL = 1; - PARENT = 36; + PARENT = 4; } DISPLAY_LINE @@ -1285,9 +948,9 @@ DISPLAY_LINE CHANNEL = "code[5]"; EXPAND_STATUS = COLLAPSED; RADIX = Binary; - TREE_INDEX = 38; + TREE_INDEX = 6; TREE_LEVEL = 1; - PARENT = 36; + PARENT = 4; } DISPLAY_LINE @@ -1295,9 +958,9 @@ DISPLAY_LINE CHANNEL = "code[4]"; EXPAND_STATUS = COLLAPSED; RADIX = Binary; - TREE_INDEX = 39; + TREE_INDEX = 7; TREE_LEVEL = 1; - PARENT = 36; + PARENT = 4; } DISPLAY_LINE @@ -1305,9 +968,9 @@ DISPLAY_LINE CHANNEL = "code[3]"; EXPAND_STATUS = COLLAPSED; RADIX = Binary; - TREE_INDEX = 40; + TREE_INDEX = 8; TREE_LEVEL = 1; - PARENT = 36; + PARENT = 4; } DISPLAY_LINE @@ -1315,9 +978,9 @@ DISPLAY_LINE CHANNEL = "code[2]"; EXPAND_STATUS = COLLAPSED; RADIX = Binary; - TREE_INDEX = 41; + TREE_INDEX = 9; TREE_LEVEL = 1; - PARENT = 36; + PARENT = 4; } DISPLAY_LINE @@ -1325,9 +988,9 @@ DISPLAY_LINE CHANNEL = "code[1]"; EXPAND_STATUS = COLLAPSED; RADIX = Binary; - TREE_INDEX = 42; + TREE_INDEX = 10; TREE_LEVEL = 1; - PARENT = 36; + PARENT = 4; } DISPLAY_LINE @@ -1335,9 +998,326 @@ DISPLAY_LINE CHANNEL = "code[0]"; EXPAND_STATUS = COLLAPSED; RADIX = Binary; - TREE_INDEX = 43; + TREE_INDEX = 11; TREE_LEVEL = 1; - PARENT = 36; + PARENT = 4; +} + +DISPLAY_LINE +{ + CHANNEL = "en"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 12; + TREE_LEVEL = 0; +} + +DISPLAY_LINE +{ + CHANNEL = "in0"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 13; + TREE_LEVEL = 0; + CHILDREN = 14, 15, 16, 17; +} + +DISPLAY_LINE +{ + CHANNEL = "in0[3]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 14; + TREE_LEVEL = 1; + PARENT = 13; +} + +DISPLAY_LINE +{ + CHANNEL = "in0[2]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 15; + TREE_LEVEL = 1; + PARENT = 13; +} + +DISPLAY_LINE +{ + CHANNEL = "in0[1]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 16; + TREE_LEVEL = 1; + PARENT = 13; +} + +DISPLAY_LINE +{ + CHANNEL = "in0[0]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 17; + TREE_LEVEL = 1; + PARENT = 13; +} + +DISPLAY_LINE +{ + CHANNEL = "in1"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 18; + TREE_LEVEL = 0; + CHILDREN = 19, 20, 21, 22; +} + +DISPLAY_LINE +{ + CHANNEL = "in1[3]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 19; + TREE_LEVEL = 1; + PARENT = 18; +} + +DISPLAY_LINE +{ + CHANNEL = "in1[2]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 20; + TREE_LEVEL = 1; + PARENT = 18; +} + +DISPLAY_LINE +{ + CHANNEL = "in1[1]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 21; + TREE_LEVEL = 1; + PARENT = 18; +} + +DISPLAY_LINE +{ + CHANNEL = "in1[0]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 22; + TREE_LEVEL = 1; + PARENT = 18; +} + +DISPLAY_LINE +{ + CHANNEL = "load"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 23; + TREE_LEVEL = 0; +} + +DISPLAY_LINE +{ + CHANNEL = "out0"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 24; + TREE_LEVEL = 0; + CHILDREN = 25, 26, 27, 28; +} + +DISPLAY_LINE +{ + CHANNEL = "out0[3]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 25; + TREE_LEVEL = 1; + PARENT = 24; +} + +DISPLAY_LINE +{ + CHANNEL = "out0[2]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 26; + TREE_LEVEL = 1; + PARENT = 24; +} + +DISPLAY_LINE +{ + CHANNEL = "out0[1]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 27; + TREE_LEVEL = 1; + PARENT = 24; +} + +DISPLAY_LINE +{ + CHANNEL = "out0[0]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 28; + TREE_LEVEL = 1; + PARENT = 24; +} + +DISPLAY_LINE +{ + CHANNEL = "out1"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 29; + TREE_LEVEL = 0; + CHILDREN = 30, 31, 32, 33; +} + +DISPLAY_LINE +{ + CHANNEL = "out1[3]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 30; + TREE_LEVEL = 1; + PARENT = 29; +} + +DISPLAY_LINE +{ + CHANNEL = "out1[2]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 31; + TREE_LEVEL = 1; + PARENT = 29; +} + +DISPLAY_LINE +{ + CHANNEL = "out1[1]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 32; + TREE_LEVEL = 1; + PARENT = 29; +} + +DISPLAY_LINE +{ + CHANNEL = "out1[0]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 33; + TREE_LEVEL = 1; + PARENT = 29; +} + +DISPLAY_LINE +{ + CHANNEL = "seg"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 34; + TREE_LEVEL = 0; + CHILDREN = 35, 36, 37, 38, 39, 40, 41, 42; +} + +DISPLAY_LINE +{ + CHANNEL = "seg[7]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 35; + TREE_LEVEL = 1; + PARENT = 34; +} + +DISPLAY_LINE +{ + CHANNEL = "seg[6]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 36; + TREE_LEVEL = 1; + PARENT = 34; +} + +DISPLAY_LINE +{ + CHANNEL = "seg[5]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 37; + TREE_LEVEL = 1; + PARENT = 34; +} + +DISPLAY_LINE +{ + CHANNEL = "seg[4]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 38; + TREE_LEVEL = 1; + PARENT = 34; +} + +DISPLAY_LINE +{ + CHANNEL = "seg[3]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 39; + TREE_LEVEL = 1; + PARENT = 34; +} + +DISPLAY_LINE +{ + CHANNEL = "seg[2]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 40; + TREE_LEVEL = 1; + PARENT = 34; +} + +DISPLAY_LINE +{ + CHANNEL = "seg[1]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 41; + TREE_LEVEL = 1; + PARENT = 34; +} + +DISPLAY_LINE +{ + CHANNEL = "seg[0]"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 42; + TREE_LEVEL = 1; + PARENT = 34; +} + +DISPLAY_LINE +{ + CHANNEL = "subclk"; + EXPAND_STATUS = COLLAPSED; + RADIX = Binary; + TREE_INDEX = 43; + TREE_LEVEL = 0; } DISPLAY_LINE diff --git a/Quartus/v4/jyh_4490_4.qsf b/Quartus/v4/jyh_4490_4.qsf index ccfe32d..8ea5da7 100644 --- a/Quartus/v4/jyh_4490_4.qsf +++ b/Quartus/v4/jyh_4490_4.qsf @@ -56,8 +56,7 @@ set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top set_global_assignment -name VERILOG_FILE jyh_4490_4_divider.v -set_global_assignment -name VECTOR_WAVEFORM_FILE Waveform.vwf -set_location_assignment PIN_43 -to CO +set_location_assignment PIN_58 -to CO set_location_assignment PIN_89 -to clk set_location_assignment PIN_24 -to clr set_location_assignment PIN_103 -to code[0] @@ -77,7 +76,6 @@ set_location_assignment PIN_46 -to out0[0] set_location_assignment PIN_50 -to out0[1] set_location_assignment PIN_52 -to out0[2] set_location_assignment PIN_54 -to out0[3] -set_location_assignment PIN_58 -to out1[0] set_location_assignment PIN_53 -to out1[1] set_location_assignment PIN_51 -to out1[2] set_location_assignment PIN_49 -to out1[3] @@ -91,4 +89,14 @@ set_location_assignment PIN_113 -to seg[6] set_location_assignment PIN_120 -to seg[7] set_location_assignment PIN_30 -to upd set_location_assignment PIN_90 -to clk_50m +set_global_assignment -name VECTOR_WAVEFORM_FILE Waveform.vwf +set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW" +set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)" +set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim (Verilog)" +set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation +set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation +set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_timing +set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_symbol +set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_signal_integrity +set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_boundary_scan set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/Quartus/v4/jyh_4490_4_counter.v b/Quartus/v4/jyh_4490_4_counter.v index 50bb9ce..7da8ed6 100644 --- a/Quartus/v4/jyh_4490_4_counter.v +++ b/Quartus/v4/jyh_4490_4_counter.v @@ -62,8 +62,6 @@ begin end end end - else - Q<=0; end endmodule diff --git a/Quartus/v4/jyh_4490_4_divider.v b/Quartus/v4/jyh_4490_4_divider.v index 4a8f4ad..8d3a828 100644 --- a/Quartus/v4/jyh_4490_4_divider.v +++ b/Quartus/v4/jyh_4490_4_divider.v @@ -1,8 +1,8 @@ module jyh_4490_4_divider(clk,clk_out); input clk; output reg clk_out; -// localparam TARGET=100000; - localparam TARGET=1; + localparam TARGET=50000; +// localparam TARGET=1; reg [19:0]counter=0; initial begin clk_out=0;