数电试验6

Quartus/v6/jyh_4490_6.qsf

@@ -70,15 +70,15 @@ set_location_assignment PIN_54 -to out0[3]
 set_location_assignment PIN_52 -to out0[2]
 set_location_assignment PIN_50 -to out0[1]
 set_location_assignment PIN_46 -to out0[0]
-set_location_assignment PIN_119 -to seg[7]
+set_location_assignment PIN_120 -to seg[7]
-set_location_assignment PIN_126 -to seg[6]
+set_location_assignment PIN_113 -to seg[6]
-set_location_assignment PIN_115 -to seg[5]
+set_location_assignment PIN_121 -to seg[5]
-set_location_assignment PIN_125 -to seg[4]
+set_location_assignment PIN_114 -to seg[4]
-set_location_assignment PIN_114 -to seg[3]
+set_location_assignment PIN_125 -to seg[3]
-set_location_assignment PIN_121 -to seg[2]
+set_location_assignment PIN_115 -to seg[2]
-set_location_assignment PIN_113 -to seg[1]
+set_location_assignment PIN_126 -to seg[1]
-set_location_assignment PIN_120 -to seg[0]
+set_location_assignment PIN_119 -to seg[0]
-set_location_assignment PIN_33 -to subclk
+set_location_assignment PIN_49 -to subclk
 set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
 set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
 set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top

Quartus/v6/jyh_4490_6_counter.v

@@ -19,41 +19,16 @@ begin
 			end
 		else
 		begin
-			if(co_flag)
-			begin
-				co<=1;
-				co_flag=0;
-			end
-			else if(!co_flag)
-				co<=0;
 			//正反计数
-			 if(upd)
-				begin
 			if(Q>=4'd9)
 				begin
 				Q<=4'd0;
-						co_flag=1;
+				co<=1;
 				end
 			else
 				begin
 				Q <= Q+1;
-						end
+				co<=0;
-				end
-			else 
-				begin
-					if(Q<=4'd0)
-						begin
-						Q<=4'd9;
-						end
-					else if(Q==4'd1)
-						begin
-						Q <= Q-1;
-						co_flag=1;
-						end
-					else
-						begin
-						Q <= Q-1;
-						end
 				end
 		end
 	end

Quartus/v6/jyh_4490_6_entry.v

@@ -12,7 +12,10 @@ output [19:0] cnt;
 
 
 wire freshclk;
-
+wire [3:0] out1;
+wire [3:0] out2;
+wire [3:0] out3;
+wire co,co2,co3;
 reg upd;
 
 initial begin
@@ -30,12 +33,36 @@ jyh_4490_6_counter C1(
 .Q(out0),
 .clk(subclk),
 .en(en),
+.co(co),
+.upd(upd));
+
+jyh_4490_6_counter C2(
+.Q(out1),
+.clk(co),
+.co(co2),
+.en(en),
+.upd(upd));
+
+jyh_4490_6_counter C3(
+.Q(out2),
+.clk(co2),
+.co(co3),
+.en(en),
+.upd(upd));
+
+jyh_4490_6_counter C4(
+.Q(out3),
+.clk(co3),
+.en(en),
 .upd(upd));
 
 //四位数码管译码器
 jyh_4490_4_encoder E1(
 .codeout(code),
 .d1(out0),
+.d2(out1),
+.d3(out2),
+.d4(out3),
 .clk(freshclk),
 .sel(seg[3:0])
 );

Quartus/v6/jyh_4490_mstate.v

@@ -13,38 +13,56 @@ else
    case(state)
 	s0:
 	begin
+		out=0;
+		cnt=0;
 		if(in)
 			state=s1;
-		out=0;
 	end
 	s1:
+		begin
+		out=0;
 		if(cnt<TARGET)
+		begin
+			state=s1;
 			cnt=cnt+1;
+		end
 		else 
 			begin
+				cnt=0;
 			   if(in)
 				state=s2;
 				else
 				state=s0;
-			cnt=0;
+			end
 		end
 	s2:
 	begin
-		if(in)
-			state=s2;
-		else
-			state=s3;
 		out=1;
+		cnt=0;
+		if(!in)
+			state=s3;
 	end
 	s3:
+		begin
+		out=1;
 		if(cnt<TARGET)
+		begin
+			state=s3;
 			cnt=cnt+1;
+		end
 		else 
 			begin
+				cnt=0;
 			   if(in)
 				state=s2;
 				else
 				state=s0;
+			end
+		end
+	default:
+	begin
+		state=s0;
+		out=0;
 		cnt=0;
 	end
 endcase