Merge branch 'main' of github.com:iridiumR/justhomework

.gitignore

@@ -101,7 +101,7 @@ Thumbs.db
 
 
 
-# Quartus
+# Quartus/ModelSim
 *_generation_script*
 *_inst.vhd
 *.bak
@@ -113,3 +113,6 @@ Thumbs.db
 **/output_files/**
 PLLJ_PLLSPE_INFO.txt
 *.qws
+*.qdb
+*.wlf
+*.qtl

Matlab/lab1.m

@@ -0,0 +1,55 @@
+figure(1);
+syms x;
+t=-5:0.0001:5;
+fx=heaviside(x+2)-heaviside(x-2);
+ezplot(fx,[-5,5]);
+
+figure(2);
+fy=heaviside(x+0.2)-heaviside(x-0.2);
+ezplot(fy,[-5,5]);
+
+figure(3);
+fz=heaviside(x+0.1)-heaviside(x-0.1);
+ezplot(fz,[-5,5]);
+
+figure(4);
+subplot(2,1,1);
+fa=5*cos(12*pi*t)+6*cos(18*pi*t);
+plot(t,fa);
+
+subplot(2,1,2);
+xcorr1=autocorr(fa,t);
+plot(corr1);
+
+figure(5);
+fb=(cos(2*pi*t)).*(cos(2*pi*t));
+plot(t,fb);
+
+figure(6);
+t = 0:0.1:10;
+b1=[1,5,6];
+a1=[1,5];
+sys=tf(a1,b1);
+y1=step(sys,t);
+a2=[1,5];
+b2=[1,2,5];
+sys=tf(a2,b2);
+y2=step(sys,t);
+a3=[1.5];
+b3=[1,2,1];
+sys=tf(a3,b3);
+y3=step(sys,t);
+plot(t,y1,t,y2,'--',t,y3,'+');
+
+figure(7);
+sys=tf([1,2],[1,3,2]);
+y=impulse(sys,t);
+plot(t,y);
+
+f=cos(t);
+sys=tf([-1,2],[1,3,2]);
+y=lsim(sys,f,t);
+plot(t,f);
+
+
+

Quartus/v4/jyh_4490_4.qsf

@@ -56,8 +56,7 @@ set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
 set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
 set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
 set_global_assignment -name VERILOG_FILE jyh_4490_4_divider.v
-set_global_assignment -name VECTOR_WAVEFORM_FILE Waveform.vwf
-set_location_assignment PIN_43 -to CO
+set_location_assignment PIN_58 -to CO
 set_location_assignment PIN_89 -to clk
 set_location_assignment PIN_24 -to clr
 set_location_assignment PIN_103 -to code[0]
@@ -77,7 +76,6 @@ set_location_assignment PIN_46 -to out0[0]
 set_location_assignment PIN_50 -to out0[1]
 set_location_assignment PIN_52 -to out0[2]
 set_location_assignment PIN_54 -to out0[3]
-set_location_assignment PIN_58 -to out1[0]
 set_location_assignment PIN_53 -to out1[1]
 set_location_assignment PIN_51 -to out1[2]
 set_location_assignment PIN_49 -to out1[3]
@@ -91,4 +89,14 @@ set_location_assignment PIN_113 -to seg[6]
 set_location_assignment PIN_120 -to seg[7]
 set_location_assignment PIN_30 -to upd
 set_location_assignment PIN_90 -to clk_50m
+set_global_assignment -name VECTOR_WAVEFORM_FILE Waveform.vwf
+set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
+set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
+set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim (Verilog)"
+set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
+set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
+set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_timing
+set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_symbol
+set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_signal_integrity
+set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_boundary_scan
 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

Quartus/v4/jyh_4490_4_counter.v

@@ -62,8 +62,6 @@ begin
 				end
 			end
 	end
-	else
-		Q<=0;
 end
 endmodule
 

Quartus/v4/jyh_4490_4_divider.v

@@ -1,8 +1,8 @@
 module jyh_4490_4_divider(clk,clk_out);
 	 input clk;
 	 output reg clk_out;
-//    localparam TARGET=100000;
-	localparam TARGET=1;
+    localparam TARGET=50000;
+//	localparam TARGET=1;
     reg [19:0]counter=0; 
     initial begin
         clk_out=0;

Quartus/v5/jyh_4490_5.qpf

@@ -0,0 +1,31 @@
+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 2021  Intel Corporation. All rights reserved.
+# Your use of Intel Corporation's design tools, logic functions 
+# and other software and tools, and any partner logic 
+# functions, and any output files from any of the foregoing 
+# (including device programming or simulation files), and any 
+# associated documentation or information are expressly subject 
+# to the terms and conditions of the Intel Program License 
+# Subscription Agreement, the Intel Quartus Prime License Agreement,
+# the Intel FPGA IP License Agreement, or other applicable license
+# agreement, including, without limitation, that your use is for
+# the sole purpose of programming logic devices manufactured by
+# Intel and sold by Intel or its authorized distributors.  Please
+# refer to the applicable agreement for further details, at
+# https://fpgasoftware.intel.com/eula.
+#
+# -------------------------------------------------------------------------- #
+#
+# Quartus Prime
+# Version 21.1.0 Build 842 10/21/2021 SJ Lite Edition
+# Date created = 19:50:40  四月 19, 2022
+#
+# -------------------------------------------------------------------------- #
+
+QUARTUS_VERSION = "21.1"
+DATE = "19:50:40  四月 19, 2022"
+
+# Revisions
+
+PROJECT_REVISION = "jyh_4490_5"

Quartus/v5/jyh_4490_5.qsf

@@ -0,0 +1,61 @@
+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 2021  Intel Corporation. All rights reserved.
+# Your use of Intel Corporation's design tools, logic functions 
+# and other software and tools, and any partner logic 
+# functions, and any output files from any of the foregoing 
+# (including device programming or simulation files), and any 
+# associated documentation or information are expressly subject 
+# to the terms and conditions of the Intel Program License 
+# Subscription Agreement, the Intel Quartus Prime License Agreement,
+# the Intel FPGA IP License Agreement, or other applicable license
+# agreement, including, without limitation, that your use is for
+# the sole purpose of programming logic devices manufactured by
+# Intel and sold by Intel or its authorized distributors.  Please
+# refer to the applicable agreement for further details, at
+# https://fpgasoftware.intel.com/eula.
+#
+# -------------------------------------------------------------------------- #
+#
+# Quartus Prime
+# Version 21.1.0 Build 842 10/21/2021 SJ Lite Edition
+# Date created = 19:50:40  四月 19, 2022
+#
+# -------------------------------------------------------------------------- #
+#
+# Notes:
+#
+# 1) The default values for assignments are stored in the file:
+#		jyh_4490_5_assignment_defaults.qdf
+#    If this file doesn't exist, see file:
+#		assignment_defaults.qdf
+#
+# 2) Intel recommends that you do not modify this file. This
+#    file is updated automatically by the Quartus Prime software
+#    and any changes you make may be lost or overwritten.
+#
+# -------------------------------------------------------------------------- #
+
+
+set_global_assignment -name FAMILY "Cyclone IV E"
+set_global_assignment -name DEVICE EP4CE6E22C8
+set_global_assignment -name TOP_LEVEL_ENTITY jyh_4490_5_divider
+set_global_assignment -name ORIGINAL_QUARTUS_VERSION 21.1.0
+set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:50:40  四月 19, 2022"
+set_global_assignment -name LAST_QUARTUS_VERSION "21.1.0 Lite Edition"
+set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
+set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
+set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
+set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
+set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
+set_global_assignment -name NOMINAL_CORE_SUPPLY_VOLTAGE 1.2V
+set_global_assignment -name VERILOG_FILE jyh_4490_5_divider.v
+set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
+set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
+set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
+set_global_assignment -name VERILOG_FILE jyh_4490_5_testbench.v
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
+set_location_assignment PIN_90 -to clk
+set_location_assignment PIN_46 -to clk_out
+set_location_assignment PIN_24 -to en
+set_location_assignment PIN_31 -to sel

Quartus/v5/jyh_4490_5_divider.v

@@ -0,0 +1,42 @@
+module jyh_4490_5_divider(clk_out,sel,clk,en);
+	input clk,sel,en;
+	output reg clk_out;
+	reg [14:0]counter=0;
+   localparam TARGET_4=2784;   // ((1/4490)/(1/50M))/4
+	localparam TARGET_5=863;		// ((1/14490)/(1/50M))/4
+
+
+   initial begin
+      clk_out=0;
+	end
+   always @(posedge clk)
+	if(en)
+	begin
+      counter<=counter+1;
+		if(sel)
+		begin
+			if(counter==TARGET_5)		
+			begin
+				clk_out<=0;
+			end
+			if(counter==4*TARGET_5)
+			begin
+				clk_out<=1;
+				counter<=0;
+			end
+		end
+
+		else if(!sel)
+		begin
+			if(counter==TARGET_4)
+				begin
+					clk_out<=0;
+				end
+			if(counter==4*TARGET_4)
+				begin
+					clk_out<=1;
+					counter<=0;
+				end
+		end
+	end
+endmodule

Quartus/v5/jyh_4490_5_testbench.v

@@ -0,0 +1,24 @@
+`timescale 1ns/1ns
+module jyh_4490_5_testbench;
+reg clk;
+reg en;
+wire clk_out;
+reg sel;
+
+initial begin
+	clk=0;
+	sel=0;
+	en=0;
+	#100
+	en=1;
+end
+
+always#10 clk=~clk;
+always#50000000 sel=~sel;
+jyh_4490_5_divider D1(
+.en(en),
+.sel(sel),
+.clk_out(clk_out),
+.clk(clk)
+);
+endmodule

Quartus/v5_testbench/jyh_4490_5_testbench.cr.mti

@@ -0,0 +1,15 @@
+/home/ir/Documents/codelib/Quartus/v5/jyh_4490_5_divider.v {1 {vlog -work work -stats=none /home/ir/Documents/codelib/Quartus/v5/jyh_4490_5_divider.v
+Model Technology ModelSim - Intel FPGA Edition vlog 2020.1 Compiler 2020.02 Feb 28 2020
+-- Compiling module jyh_4490_5_divider
+
+Top level modules:
+	jyh_4490_5_divider
+
+} {} {}} /home/ir/Documents/codelib/Quartus/v5/jyh_4490_5_testbench.v {1 {vlog -work work -stats=none /home/ir/Documents/codelib/Quartus/v5/jyh_4490_5_testbench.v
+Model Technology ModelSim - Intel FPGA Edition vlog 2020.1 Compiler 2020.02 Feb 28 2020
+-- Compiling module jyh_4490_5_testbench
+
+Top level modules:
+	jyh_4490_5_testbench
+
+} {} {}}

Quartus/v5_testbench/jyh_4490_5_testbench.mpf

@@ -0,0 +1,469 @@
+; Copyright 1991-2009 Mentor Graphics Corporation
+;
+; All Rights Reserved.
+;
+; THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION WHICH IS THE PROPERTY OF 
+; MENTOR GRAPHICS CORPORATION OR ITS LICENSORS AND IS SUBJECT TO LICENSE TERMS.
+;   
+
+[Library]
+std = $MODEL_TECH/../std
+ieee = $MODEL_TECH/../ieee
+verilog = $MODEL_TECH/../verilog
+vital2000 = $MODEL_TECH/../vital2000
+std_developerskit = $MODEL_TECH/../std_developerskit
+synopsys = $MODEL_TECH/../synopsys
+modelsim_lib = $MODEL_TECH/../modelsim_lib
+sv_std = $MODEL_TECH/../sv_std
+
+; Altera Primitive libraries
+;
+; VHDL Section
+;
+altera_mf = $MODEL_TECH/../altera/vhdl/altera_mf
+altera = $MODEL_TECH/../altera/vhdl/altera
+altera_lnsim = $MODEL_TECH/../altera/vhdl/altera_lnsim
+lpm = $MODEL_TECH/../altera/vhdl/220model
+220model = $MODEL_TECH/../altera/vhdl/220model
+maxii = $MODEL_TECH/../altera/vhdl/maxii
+maxv = $MODEL_TECH/../altera/vhdl/maxv
+fiftyfivenm = $MODEL_TECH/../altera/vhdl/fiftyfivenm
+sgate = $MODEL_TECH/../altera/vhdl/sgate
+arriaii = $MODEL_TECH/../altera/vhdl/arriaii
+arriaii_hssi = $MODEL_TECH/../altera/vhdl/arriaii_hssi
+arriaii_pcie_hip = $MODEL_TECH/../altera/vhdl/arriaii_pcie_hip
+arriaiigz = $MODEL_TECH/../altera/vhdl/arriaiigz
+arriaiigz_hssi = $MODEL_TECH/../altera/vhdl/arriaiigz_hssi
+arriaiigz_pcie_hip = $MODEL_TECH/../altera/vhdl/arriaiigz_pcie_hip
+stratixiv = $MODEL_TECH/../altera/vhdl/stratixiv
+stratixiv_hssi = $MODEL_TECH/../altera/vhdl/stratixiv_hssi
+stratixiv_pcie_hip = $MODEL_TECH/../altera/vhdl/stratixiv_pcie_hip
+cycloneiv = $MODEL_TECH/../altera/vhdl/cycloneiv
+cycloneiv_hssi = $MODEL_TECH/../altera/vhdl/cycloneiv_hssi
+cycloneiv_pcie_hip = $MODEL_TECH/../altera/vhdl/cycloneiv_pcie_hip
+cycloneive = $MODEL_TECH/../altera/vhdl/cycloneive
+stratixv = $MODEL_TECH/../altera/vhdl/stratixv
+stratixv_hssi = $MODEL_TECH/../altera/vhdl/stratixv_hssi
+stratixv_pcie_hip = $MODEL_TECH/../altera/vhdl/stratixv_pcie_hip
+arriavgz = $MODEL_TECH/../altera/vhdl/arriavgz
+arriavgz_hssi = $MODEL_TECH/../altera/vhdl/arriavgz_hssi
+arriavgz_pcie_hip = $MODEL_TECH/../altera/vhdl/arriavgz_pcie_hip
+arriav = $MODEL_TECH/../altera/vhdl/arriav
+cyclonev = $MODEL_TECH/../altera/vhdl/cyclonev
+twentynm = $MODEL_TECH/../altera/vhdl/twentynm
+twentynm_hssi = $MODEL_TECH/../altera/vhdl/twentynm_hssi
+twentynm_hip = $MODEL_TECH/../altera/vhdl/twentynm_hip
+cyclone10lp = $MODEL_TECH/../altera/vhdl/cyclone10lp
+;
+; Verilog Section
+;
+altera_mf_ver = $MODEL_TECH/../altera/verilog/altera_mf
+altera_ver = $MODEL_TECH/../altera/verilog/altera
+altera_lnsim_ver = $MODEL_TECH/../altera/verilog/altera_lnsim
+lpm_ver = $MODEL_TECH/../altera/verilog/220model
+220model_ver = $MODEL_TECH/../altera/verilog/220model
+maxii_ver = $MODEL_TECH/../altera/verilog/maxii
+maxv_ver = $MODEL_TECH/../altera/verilog/maxv
+fiftyfivenm_ver = $MODEL_TECH/../altera/verilog/fiftyfivenm
+sgate_ver = $MODEL_TECH/../altera/verilog/sgate
+arriaii_ver = $MODEL_TECH/../altera/verilog/arriaii
+arriaii_hssi_ver = $MODEL_TECH/../altera/verilog/arriaii_hssi
+arriaii_pcie_hip_ver = $MODEL_TECH/../altera/verilog/arriaii_pcie_hip
+arriaiigz_ver = $MODEL_TECH/../altera/verilog/arriaiigz
+arriaiigz_hssi_ver = $MODEL_TECH/../altera/verilog/arriaiigz_hssi
+arriaiigz_pcie_hip_ver = $MODEL_TECH/../altera/verilog/arriaiigz_pcie_hip
+stratixiv_ver = $MODEL_TECH/../altera/verilog/stratixiv
+stratixiv_hssi_ver = $MODEL_TECH/../altera/verilog/stratixiv_hssi
+stratixiv_pcie_hip_ver = $MODEL_TECH/../altera/verilog/stratixiv_pcie_hip
+stratixv_ver = $MODEL_TECH/../altera/verilog/stratixv
+stratixv_hssi_ver = $MODEL_TECH/../altera/verilog/stratixv_hssi
+stratixv_pcie_hip_ver = $MODEL_TECH/../altera/verilog/stratixv_pcie_hip
+arriavgz_ver = $MODEL_TECH/../altera/verilog/arriavgz
+arriavgz_hssi_ver = $MODEL_TECH/../altera/verilog/arriavgz_hssi
+arriavgz_pcie_hip_ver = $MODEL_TECH/../altera/verilog/arriavgz_pcie_hip
+arriav_ver = $MODEL_TECH/../altera/verilog/arriav
+arriav_hssi_ver = $MODEL_TECH/../altera/verilog/arriav_hssi
+arriav_pcie_hip_ver = $MODEL_TECH/../altera/verilog/arriav_pcie_hip
+cyclonev_ver = $MODEL_TECH/../altera/verilog/cyclonev
+cyclonev_hssi_ver = $MODEL_TECH/../altera/verilog/cyclonev_hssi
+cyclonev_pcie_hip_ver = $MODEL_TECH/../altera/verilog/cyclonev_pcie_hip
+cycloneiv_ver = $MODEL_TECH/../altera/verilog/cycloneiv
+cycloneiv_hssi_ver = $MODEL_TECH/../altera/verilog/cycloneiv_hssi
+cycloneiv_pcie_hip_ver = $MODEL_TECH/../altera/verilog/cycloneiv_pcie_hip
+cycloneive_ver = $MODEL_TECH/../altera/verilog/cycloneive
+twentynm_ver = $MODEL_TECH/../altera/verilog/twentynm
+twentynm_hssi_ver = $MODEL_TECH/../altera/verilog/twentynm_hssi
+twentynm_hip_ver = $MODEL_TECH/../altera/verilog/twentynm_hip
+cyclone10lp_ver = $MODEL_TECH/../altera/verilog/cyclone10lp
+
+work = work
+[vcom]
+; VHDL93 variable selects language version as the default. 
+; Default is VHDL-2002.
+; Value of 0 or 1987 for VHDL-1987.
+; Value of 1 or 1993 for VHDL-1993.
+; Default or value of 2 or 2002 for VHDL-2002.
+; Default or value of 3 or 2008 for VHDL-2008.
+VHDL93 = 2002
+
+; Show source line containing error. Default is off.
+; Show_source = 1
+
+; Turn off unbound-component warnings. Default is on.
+; Show_Warning1 = 0
+
+; Turn off process-without-a-wait-statement warnings. Default is on.
+; Show_Warning2 = 0
+
+; Turn off null-range warnings. Default is on.
+; Show_Warning3 = 0
+
+; Turn off no-space-in-time-literal warnings. Default is on.
+; Show_Warning4 = 0
+
+; Turn off multiple-drivers-on-unresolved-signal warnings. Default is on.
+; Show_Warning5 = 0
+
+; Turn off optimization for IEEE std_logic_1164 package. Default is on.
+; Optimize_1164 = 0
+
+; Turn on resolving of ambiguous function overloading in favor of the
+; "explicit" function declaration (not the one automatically created by
+; the compiler for each type declaration). Default is off.
+; The .ini file has Explicit enabled so that std_logic_signed/unsigned
+; will match the behavior of synthesis tools.
+Explicit = 1
+
+; Turn off acceleration of the VITAL packages. Default is to accelerate.
+; NoVital = 1
+
+; Turn off VITAL compliance checking. Default is checking on.
+; NoVitalCheck = 1
+
+; Ignore VITAL compliance checking errors. Default is to not ignore.
+; IgnoreVitalErrors = 1
+
+; Turn off VITAL compliance checking warnings. Default is to show warnings.
+; Show_VitalChecksWarnings = 0
+
+; Keep silent about case statement static warnings.
+; Default is to give a warning.
+; NoCaseStaticError = 1
+
+; Keep silent about warnings caused by aggregates that are not locally static.
+; Default is to give a warning.
+; NoOthersStaticError = 1
+
+; Turn off inclusion of debugging info within design units.
+; Default is to include debugging info.
+; NoDebug = 1
+
+; Turn off "Loading..." messages. Default is messages on.
+; Quiet = 1
+
+; Turn on some limited synthesis rule compliance checking. Checks only:
+;    -- signals used (read) by a process must be in the sensitivity list
+; CheckSynthesis = 1
+
+; Activate optimizations on expressions that do not involve signals,
+; waits, or function/procedure/task invocations. Default is off.
+; ScalarOpts = 1
+
+; Require the user to specify a configuration for all bindings,
+; and do not generate a compile time default binding for the
+; component. This will result in an elaboration error of
+; 'component not bound' if the user fails to do so. Avoids the rare
+; issue of a false dependency upon the unused default binding.
+; RequireConfigForAllDefaultBinding = 1
+
+; Inhibit range checking on subscripts of arrays. Range checking on
+; scalars defined with subtypes is inhibited by default.
+; NoIndexCheck = 1
+
+; Inhibit range checks on all (implicit and explicit) assignments to
+; scalar objects defined with subtypes.
+; NoRangeCheck = 1
+
+[vlog]
+
+; Turn off inclusion of debugging info within design units.
+; Default is to include debugging info.
+; NoDebug = 1
+
+; Turn off "loading..." messages. Default is messages on.
+; Quiet = 1
+
+; Turn on Verilog hazard checking (order-dependent accessing of global vars).
+; Default is off.
+; Hazard = 1
+
+; Turn on converting regular Verilog identifiers to uppercase. Allows case
+; insensitivity for module names. Default is no conversion.
+; UpCase = 1
+
+; Turn on incremental compilation of modules. Default is off.
+; Incremental = 1
+
+; Turns on lint-style checking.
+; Show_Lint = 1
+
+[vsim]
+; Simulator resolution
+; Set to fs, ps, ns, us, ms, or sec with optional prefix of 1, 10, or 100.
+Resolution = ps
+
+; User time unit for run commands
+; Set to default, fs, ps, ns, us, ms, or sec. The default is to use the
+; unit specified for Resolution. For example, if Resolution is 100ps,
+; then UserTimeUnit defaults to ps.
+; Should generally be set to default.
+UserTimeUnit = default
+
+; Default run length
+RunLength = 100 sec
+
+; Maximum iterations that can be run without advancing simulation time
+IterationLimit = 5000
+
+; Directive to license manager:
+; vhdl          Immediately reserve a VHDL license
+; vlog          Immediately reserve a Verilog license
+; plus          Immediately reserve a VHDL and Verilog license
+; nomgc         Do not look for Mentor Graphics Licenses
+; nomti         Do not look for Model Technology Licenses
+; noqueue       Do not wait in the license queue when a license isn't available
+; viewsim	Try for viewer license but accept simulator license(s) instead
+;		of queuing for viewer license
+; License = plus
+
+; Stop the simulator after a VHDL/Verilog assertion message
+; 0 = Note  1 = Warning  2 = Error  3 = Failure  4 = Fatal
+BreakOnAssertion = 3
+
+; Assertion Message Format
+; %S - Severity Level 
+; %R - Report Message
+; %T - Time of assertion
+; %D - Delta
+; %I - Instance or Region pathname (if available)
+; %% - print '%' character
+; AssertionFormat = "** %S: %R\n   Time: %T  Iteration: %D%I\n"
+
+; Assertion File - alternate file for storing VHDL/Verilog assertion messages
+; AssertFile = assert.log
+
+; Default radix for all windows and commands...
+; Set to symbolic, ascii, binary, octal, decimal, hex, unsigned
+DefaultRadix = symbolic
+
+; VSIM Startup command
+; Startup = do startup.do
+
+; File for saving command transcript
+TranscriptFile = transcript
+
+; File for saving command history
+; CommandHistory = cmdhist.log
+
+; Specify whether paths in simulator commands should be described
+; in VHDL or Verilog format.
+; For VHDL, PathSeparator = /
+; For Verilog, PathSeparator = .
+; Must not be the same character as DatasetSeparator.
+PathSeparator = /
+
+; Specify the dataset separator for fully rooted contexts.
+; The default is ':'. For example, sim:/top
+; Must not be the same character as PathSeparator.
+DatasetSeparator = :
+
+; Disable VHDL assertion messages
+; IgnoreNote = 1
+; IgnoreWarning = 1
+; IgnoreError = 1
+; IgnoreFailure = 1
+
+; Default force kind. May be freeze, drive, deposit, or default
+; or in other terms, fixed, wired, or charged.
+; A value of "default" will use the signal kind to determine the
+; force kind, drive for resolved signals, freeze for unresolved signals
+; DefaultForceKind = freeze
+
+; If zero, open files when elaborated; otherwise, open files on
+; first read or write.  Default is 0.
+; DelayFileOpen = 1
+
+; Control VHDL files opened for write.
+;   0 = Buffered, 1 = Unbuffered
+UnbufferedOutput = 0
+
+; Control the number of VHDL files open concurrently.
+; This number should always be less than the current ulimit
+; setting for max file descriptors.
+;   0 = unlimited
+ConcurrentFileLimit = 40
+
+; Control the number of hierarchical regions displayed as
+; part of a signal name shown in the Wave window.
+; A value of zero tells VSIM to display the full name.
+; The default is 0.
+; WaveSignalNameWidth = 0
+
+; Turn off warnings from the std_logic_arith, std_logic_unsigned
+; and std_logic_signed packages.
+; StdArithNoWarnings = 1
+
+; Turn off warnings from the IEEE numeric_std and numeric_bit packages.
+; NumericStdNoWarnings = 1
+
+; Control the format of the (VHDL) FOR generate statement label
+; for each iteration.  Do not quote it.
+; The format string here must contain the conversion codes %s and %d,
+; in that order, and no other conversion codes.  The %s represents
+; the generate_label; the %d represents the generate parameter value
+; at a particular generate iteration (this is the position number if
+; the generate parameter is of an enumeration type).  Embedded whitespace
+; is allowed (but discouraged); leading and trailing whitespace is ignored.
+; Application of the format must result in a unique scope name over all
+; such names in the design so that name lookup can function properly.
+; GenerateFormat = %s__%d
+
+; Specify whether checkpoint files should be compressed.
+; The default is 1 (compressed).
+; CheckpointCompressMode = 0
+
+; List of dynamically loaded objects for Verilog PLI applications
+; Veriuser = veriuser.sl
+
+; Specify default options for the restart command. Options can be one
+; or more of: -force -nobreakpoint -nolist -nolog -nowave
+; DefaultRestartOptions = -force
+
+; HP-UX 10.20 ONLY - Enable memory locking to speed up large designs
+; (> 500 megabyte memory footprint). Default is disabled.
+; Specify number of megabytes to lock.
+; LockedMemory = 1000
+
+; Turn on (1) or off (0) WLF file compression.
+; The default is 1 (compress WLF file).
+; WLFCompress = 0
+
+; Specify whether to save all design hierarchy (1) in the WLF file
+; or only regions containing logged signals (0).
+; The default is 0 (save only regions with logged signals).
+; WLFSaveAllRegions = 1
+
+; WLF file time limit.  Limit WLF file by time, as closely as possible,
+; to the specified amount of simulation time.  When the limit is exceeded
+; the earliest times get truncated from the file.
+; If both time and size limits are specified the most restrictive is used.
+; UserTimeUnits are used if time units are not specified.
+; The default is 0 (no limit).  Example: WLFTimeLimit = {100 ms}
+; WLFTimeLimit = 0
+
+; WLF file size limit.  Limit WLF file size, as closely as possible,
+; to the specified number of megabytes.  If both time and size limits
+; are specified then the most restrictive is used.
+; The default is 0 (no limit).
+; WLFSizeLimit = 1000
+
+; Specify whether or not a WLF file should be deleted when the
+; simulation ends.  A value of 1 will cause the WLF file to be deleted.
+; The default is 0 (do not delete WLF file when simulation ends).
+; WLFDeleteOnQuit = 1
+
+; Automatic SDF compilation
+; Disables automatic compilation of SDF files in flows that support it.
+; Default is on, uncomment to turn off.
+; NoAutoSDFCompile = 1
+
+[lmc]
+
+[msg_system]
+suppress = 3116
+; Change a message severity or suppress a message.
+; The format is: <msg directive> = <msg number>[,<msg number>...]
+; Examples:
+;   note = 3009
+;   warning = 3033
+;   error = 3010,3016
+;   fatal = 3016,3033
+;   suppress = 3009,3016,3043
+; The command verror <msg number> can be used to get the complete
+; description of a message.
+
+; Control transcripting of elaboration/runtime messages.
+; The default is to have messages appear in the transcript and 
+; recorded in the wlf file (messages that are recorded in the
+; wlf file can be viewed in the MsgViewer).  The other settings
+; are to send messages only to the transcript or only to the 
+; wlf file.  The valid values are
+;    both  {default}
+;    tran  {transcript only}
+;    wlf   {wlf file only}
+; msgmode = both
+[Project]
+** Warning: ; Warning -- Do not edit the project properties directly.
+;            Property names are dynamic in nature and property
+;            values have special syntax.  Changing property data directly
+;            can result in a corrupt MPF file.  All project properties
+;            can be modified through project window dialogs.
+Project_Version = 6
+Project_DefaultLib = work
+Project_SortMethod = unused
+Project_Files_Count = 2
+Project_File_0 = /home/ir/Documents/codelib/Quartus/v5/jyh_4490_5_divider.v
+Project_File_P_0 = cover_toggle 0 file_type verilog group_id 0 cover_exttoggle 0 cover_nofec 0 cover_cond 0 vlog_1995compat 0 vlog_nodebug 0 cover_branch 0 vlog_noload 0 folder {Top Level} last_compile 1650375953 cover_fsm 0 cover_excludedefault 0 vlog_enable0In 0 vlog_disableopt 0 cover_covercells 0 voptflow 1 vlog_showsource 0 vlog_hazard 0 cover_optlevel 3 toggle - vlog_0InOptions {} ood 0 cover_noshort 0 vlog_upper 0 compile_to work vlog_options {} compile_order 0 cover_expr 0 dont_compile 0 cover_stmt 0
+Project_File_1 = /home/ir/Documents/codelib/Quartus/v5/jyh_4490_5_testbench.v
+Project_File_P_1 = cover_toggle 0 file_type verilog group_id 0 cover_exttoggle 0 cover_nofec 0 cover_cond 0 vlog_1995compat 0 vlog_nodebug 0 folder {Top Level} last_compile 1650375953 cover_fsm 0 cover_branch 0 vlog_noload 0 cover_excludedefault 0 vlog_enable0In 0 vlog_disableopt 0 cover_covercells 0 voptflow 1 vlog_showsource 0 vlog_hazard 0 cover_optlevel 3 toggle - vlog_0InOptions {} ood 0 cover_noshort 0 vlog_upper 0 compile_to work vlog_options {} compile_order 1 cover_expr 0 dont_compile 0 cover_stmt 0
+Project_Sim_Count = 1
+Project_Sim_0 = Simulation 1
+Project_Sim_P_0 = -L {} -Lf {} -sdf {} selected_du {} additional_dus work.jyh_4490_5_testbench folder {Top Level} ok 1 -t default timing default +plusarg {} -nofileshare 0 -sdfnowarn 0 -wlf {} OtherArgs {} -coverage 0 -sdfnoerror 0 -std_input {} -hazards 0 -noglitch 0 -absentisempty 0 +no_pulse_msg 0 -sc22 0 +pulse_r {} -assertfile {} -multisource_delay {} -vital2.2b 0 +notimingchecks 0 +pulse_e {} -std_output {} vopt_env 1 is_vopt_flow 0 Generics {}
+Project_Folder_Count = 0
+Echo_Compile_Output = 0
+Save_Compile_Report = 1
+Project_Opt_Count = 0
+ForceSoftPaths = 0
+ProjectStatusDelay = 5000
+VERILOG_DoubleClick = Edit
+VERILOG_CustomDoubleClick = 
+SYSTEMVERILOG_DoubleClick = Edit
+SYSTEMVERILOG_CustomDoubleClick = 
+VHDL_DoubleClick = Edit
+VHDL_CustomDoubleClick = 
+PSL_DoubleClick = Edit
+PSL_CustomDoubleClick = 
+TEXT_DoubleClick = Edit
+TEXT_CustomDoubleClick = 
+SYSTEMC_DoubleClick = Edit
+SYSTEMC_CustomDoubleClick = 
+TCL_DoubleClick = Edit
+TCL_CustomDoubleClick = 
+MACRO_DoubleClick = Edit
+MACRO_CustomDoubleClick = 
+VCD_DoubleClick = Edit
+VCD_CustomDoubleClick = 
+SDF_DoubleClick = Edit
+SDF_CustomDoubleClick = 
+XML_DoubleClick = Edit
+XML_CustomDoubleClick = 
+LOGFILE_DoubleClick = Edit
+LOGFILE_CustomDoubleClick = 
+UCDB_DoubleClick = Edit
+UCDB_CustomDoubleClick = 
+TDB_DoubleClick = Edit
+TDB_CustomDoubleClick = 
+UPF_DoubleClick = Edit
+UPF_CustomDoubleClick = 
+PCF_DoubleClick = Edit
+PCF_CustomDoubleClick = 
+PROJECT_DoubleClick = Edit
+PROJECT_CustomDoubleClick = 
+VRM_DoubleClick = Edit
+VRM_CustomDoubleClick = 
+DEBUGDATABASE_DoubleClick = Edit
+DEBUGDATABASE_CustomDoubleClick = 
+DEBUGARCHIVE_DoubleClick = Edit
+DEBUGARCHIVE_CustomDoubleClick = 
+Project_Major_Version = 2020
+Project_Minor_Version = 1

Quartus/v5_testbench/work/_info

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Quartus/v5_testbench/work/_vmake

@@ -0,0 +1,4 @@
+m255
+K4
+z0
+cModel Technology

SoftwareDesign/Code/2-3-4/mainwindow.cpp

@@ -1,15 +0,0 @@
-#include "mainwindow.h"
-#include "ui_mainwindow.h"
-
-MainWindow::MainWindow(QWidget *parent)
-    : QMainWindow(parent)
-    , ui(new Ui::MainWindow)
-{
-    ui->setupUi(this);
-}
-
-MainWindow::~MainWindow()
-{
-    delete ui;
-}
-

SoftwareDesign/Lab2/2-3-4/mainwindow.cpp

@@ -0,0 +1,40 @@
+#include "mainwindow.h"
+#include "ui_mainwindow.h"
+
+MainWindow::MainWindow(QWidget *parent)
+    : QMainWindow(parent), ui(new Ui::MainWindow) {
+  ui->setupUi(this);
+  ui->centralwidget->setMouseTracking(true);
+  setMouseTracking(true);
+}
+
+MainWindow::~MainWindow() { delete ui; }
+
+void MainWindow::mousePressEvent(QMouseEvent *e) {
+  if (e->button() == Qt::LeftButton)
+    ui->l1->setText("Left button press");
+  else
+    ui->l1->setText("Right button press");
+}
+void MainWindow::mouseReleaseEvent(QMouseEvent *e) {
+  if (e->button() == Qt::LeftButton)
+    ui->l1->setText("Left button release");
+  else
+    ui->l1->setText("Right button release");
+}
+void MainWindow::mouseDoubleClickEvent(QMouseEvent *e) {
+  if (e->button() == Qt::LeftButton)
+    ui->l1->setText("Left button double click");
+  else
+    ui->l1->setText("Right button double click");
+}
+void MainWindow::mouseMoveEvent(QMouseEvent *e) {
+  QPoint pos = e->globalPos();
+  ui->l2->setText(QString("(%1,%2)").arg(pos.rx()).arg(pos.ry()));
+}
+void MainWindow::wheelEvent(QWheelEvent *e) {
+  if (e->delta() > 0)
+    ui->l1->setText("scroll up");
+  else
+    ui->l1->setText("scroll down");
+}

SoftwareDesign/Lab2/2-3-4/mainwindow.h

@@ -0,0 +1,31 @@
+#ifndef MAINWINDOW_H
+#define MAINWINDOW_H
+
+#include <QMainWindow>
+#include <QMouseEvent>
+#include <QWheelEvent>
+
+QT_BEGIN_NAMESPACE
+namespace Ui {
+class MainWindow;
+}
+QT_END_NAMESPACE
+
+class MainWindow : public QMainWindow {
+  Q_OBJECT
+
+public:
+  MainWindow(QWidget *parent = nullptr);
+  ~MainWindow();
+
+private:
+  Ui::MainWindow *ui;
+
+protected:
+  void mousePressEvent(QMouseEvent *e);
+  void mouseReleaseEvent(QMouseEvent *e);
+  void mouseDoubleClickEvent(QMouseEvent *e);
+  void mouseMoveEvent(QMouseEvent *e);
+  void wheelEvent(QWheelEvent *e);
+};
+#endif // MAINWINDOW_H

SoftwareDesign/Lab2/2-3-4/mainwindow.ui

@@ -14,12 +14,12 @@
    <string>4490</string>
   </property>
   <widget class="QWidget" name="centralwidget">
-   <widget class="QLabel" name="label">
+   <widget class="QLabel" name="l2">
     <property name="geometry">
      <rect>
-      <x>110</x>
+      <x>450</x>
       <y>160</y>
-      <width>77</width>
+      <width>311</width>
       <height>25</height>
      </rect>
     </property>
@@ -27,12 +27,12 @@
      <string>TextLabel</string>
     </property>
    </widget>
-   <widget class="QLabel" name="label_2">
+   <widget class="QLabel" name="l1">
     <property name="geometry">
      <rect>
-      <x>330</x>
+      <x>160</x>
       <y>160</y>
-      <width>77</width>
+      <width>221</width>
       <height>25</height>
      </rect>
     </property>

SoftwareDesign/Lab2/Lab2-3_Calculator4490_v3/Lab2-3_Calculator4490_v3.pro

@@ -0,0 +1,26 @@
+QT       += core gui
+
+greaterThan(QT_MAJOR_VERSION, 4): QT += widgets
+
+CONFIG += c++17
+
+# You can make your code fail to compile if it uses deprecated APIs.
+# In order to do so, uncomment the following line.
+#DEFINES += QT_DISABLE_DEPRECATED_BEFORE=0x060000    # disables all the APIs deprecated before Qt 6.0.0
+
+SOURCES += \
+    cal.cpp \
+    main.cpp \
+    mainwindow.cpp
+
+HEADERS += \
+    cal.h \
+    mainwindow.h
+
+FORMS += \
+    mainwindow.ui
+
+# Default rules for deployment.
+qnx: target.path = /tmp/$${TARGET}/bin
+else: unix:!android: target.path = /opt/$${TARGET}/bin
+!isEmpty(target.path): INSTALLS += target

SoftwareDesign/Lab2/Lab2-3_Calculator4490_v3/cal.cpp

@@ -0,0 +1,75 @@
+#include <algorithm> // remove()
+#include <cmath>     // pow()
+#include <iostream>
+#include <stack>     // stack<T>
+#include <stdexcept> // runtime_error
+#include <string>    // string
+using std::string;
+
+// 返回运算符的优先级，值越大，优先级越高
+inline size_t precedence(const char op) {
+  if (op == '+' || op == '-')
+    return 1;
+  if (op == '*' || op == '/')
+    return 2;
+  if (op == '^')
+    return 3;
+  throw std::runtime_error{string{"表达中包含无效的运算符"} + op};
+}
+// 计算
+double execute(std::stack<char> &ops, std::stack<double> &operands) {
+  double result;
+  double rhs=operands.top(); // 得到右操作数
+  operands.pop();
+  double lhs=operands.top(); // 得到左操作数
+  operands.pop();
+  switch (ops.top()) // 根据两个操作数之间的运算符，执行相应计算
+  {
+  case '+':
+    result = lhs + rhs;
+    break;
+  case '-':
+    result = lhs - rhs;
+    break;
+  case '*':
+    result = lhs * rhs;
+    break;
+  case '/':
+    result = lhs / rhs;
+    break;
+  case '^':
+    result = std::pow(lhs, rhs);
+    break;
+  default:
+    throw std::runtime_error{string{"invalid operator: "} + ops.top()};
+  }
+  ops.pop();             //计算完成后，该运算符要弹栈
+  operands.push(result); //将新计算出来的结果入栈
+  return result;
+}
+double cal(string exp) {
+  static std::stack<double> operands; //数值
+  static std::stack<char> operators;  //运算符
+
+  size_t index{}; //位数
+
+  operands.push(std::stod(exp, &index)); // 将表达式中第一个数字进栈
+  while (true) {
+    operators.push(exp[index++]); // 将运算符进栈
+    size_t i{};
+    operands.push(
+        std::stod(exp.substr(index),
+                  &i)); //将运算符后的数字也进栈,并将数字的位数赋值给 i。
+    index += i; //更新 index
+    if (index == exp.length()) {
+      while (!operators.empty()) //如果 operators不为空，表示还没有计算完
+        execute(operators, operands);
+      break;
+    }
+    //如果表达式还未遍历完，但子表达式中的运算符优先级比其后面的运算符优先级大，就先计算当前的子表达式的值
+    while (!operators.empty() &&
+           precedence(exp[index]) <= precedence(operators.top()))
+      execute(operators, operands);
+  }
+  return operands.top();
+}

SoftwareDesign/Lab2/Lab2-3_Calculator4490_v3/cal.h

@@ -0,0 +1,5 @@
+#ifndef CAL_H
+#define CAL_H
+#include <iostream>
+double cal(std::string exp);
+#endif // CAL_H

SoftwareDesign/Lab2/Lab2-3_Calculator4490_v3/main.cpp

@@ -0,0 +1,11 @@
+#include "mainwindow.h"
+
+#include <QApplication>
+
+int main(int argc, char *argv[])
+{
+    QApplication a(argc, argv);
+    MainWindow w;
+    w.show();
+    return a.exec();
+}

SoftwareDesign/Lab2/Lab2-3_Calculator4490_v3/mainwindow.cpp

@@ -0,0 +1,127 @@
+#include "mainwindow.h"
+#include "cal.h"
+#include "ui_mainwindow.h"
+#include <QMessageBox>
+
+static QString displayText;
+
+MainWindow::MainWindow(QWidget *parent)
+    : QMainWindow(parent), ui(new Ui::MainWindow) {
+  ui->setupUi(this);
+  ui->lineEdit->setText("0");
+  result = 0.0;
+  waitForOperand = true;
+
+  connectSlots();
+}
+
+MainWindow::~MainWindow() { delete ui; }
+
+//错误处理
+void MainWindow::abortOperation() {
+  result = 0.0;
+  pendingOperator.clear();
+  ui->lineEdit->setText("0");
+  isFinished = false;
+  QMessageBox::warning(this, "运算错误", "算式不合法");
+}
+
+//数字被点击
+void MainWindow::digitClicked() {
+  QPushButton *digitBtn = static_cast<QPushButton *>(sender());
+  //    if(ui->lineEdit->text() == "0" && value == "0")
+  //        return;
+  if (!isFinished) {
+    displayText.append(digitBtn->text());
+    ui->lineEdit->setText(displayText);
+  } else {
+    return;
+  }
+}
+
+void MainWindow::on_clearBtn_clicked() {
+  //将当前显示的数归零
+  displayText.chop(1);
+  ui->lineEdit->setText(displayText);
+  isFinished = false;
+}
+
+void MainWindow::on_clearAllBtn_clicked() {
+  //将当前显示的数据归零，并将之前保存的数据运算清除
+  displayText.clear();
+  ui->lineEdit->setText(displayText);
+  isFinished = false;
+  result = 0.0;
+}
+
+void MainWindow::on_equalBtn_clicked() {
+  try {
+    result = cal(displayText.toStdString());
+  }
+
+  catch (...) {
+    abortOperation();
+  }
+  isFinished = 1;
+  ui->lineEdit->setText(QString::number(result));
+}
+
+//运算符
+void MainWindow::operatorClicked() {
+  QPushButton *clickedBtn = qobject_cast<QPushButton *>(sender());
+  if (!isFinished) {
+    displayText.append(clickedBtn->text());
+    ui->lineEdit->setText(displayText);
+  } else {
+    return;
+  }
+}
+
+//槽链接
+void MainWindow::connectSlots() {
+
+  QPushButton *digitBtns[10] = {ui->digitBtn0, ui->digitBtn1, ui->digitBtn2,
+                                ui->digitBtn3, ui->digitBtn4, ui->digitBtn5,
+                                ui->digitBtn6, ui->digitBtn7, ui->digitBtn8,
+                                ui->digitBtn9};
+  for (auto btn : digitBtns)
+    connect(btn, &QPushButton::clicked, this, &MainWindow::digitClicked);
+  QPushButton *operatorBtns[6] = {ui->addBtn,    ui->subtractionBtn,
+                                  ui->mulBtn,    ui->divisionBtn,
+                                  ui->squareBtn, ui->pointBtn};
+  for (auto btn : operatorBtns)
+    connect(btn, &QPushButton::clicked, this, &MainWindow::operatorClicked);
+}
+
+void MainWindow::keyPressEvent(QKeyEvent *event) {
+  switch (event->key()) {
+  case Qt::Key_0:
+    emit ui->digitBtn0->clicked();
+    break;
+  case Qt::Key_1:
+    emit ui->digitBtn1->clicked();
+    break;
+  case Qt::Key_2:
+    emit ui->digitBtn2->clicked();
+    break;
+  case Qt::Key_3:
+    emit ui->digitBtn3->clicked();
+    break;
+  case Qt::Key_4:
+    emit ui->digitBtn4->clicked();
+    break;
+  case Qt::Key_5:
+    emit ui->digitBtn5->clicked();
+    break;
+  case Qt::Key_6:
+    emit ui->digitBtn6->clicked();
+    break;
+  case Qt::Key_7:
+    emit ui->digitBtn7->clicked();
+    break;
+  case Qt::Key_8: 
+  
+  default:
+    break;
+  }
+}

SoftwareDesign/Lab2/Lab2-3_Calculator4490_v3/mainwindow.h

@@ -0,0 +1,48 @@
+#ifndef MAINWINDOW_H
+#define MAINWINDOW_H
+
+#include <QKeyEvent>
+#include <QMainWindow>
+QT_BEGIN_NAMESPACE
+namespace Ui {
+class MainWindow;
+}
+QT_END_NAMESPACE
+
+class MainWindow : public QMainWindow {
+  Q_OBJECT
+
+public:
+  MainWindow(QWidget *parent = nullptr);
+  ~MainWindow();
+
+private:
+  Ui::MainWindow *ui;
+
+  void keyPressEvent(QKeyEvent *e);
+
+  //终止运算，清除数据，报错
+  void abortOperation();
+  //连接信号和槽
+  void connectSlots();
+  //储存运算符
+  QString pendingOperator;
+  //储存运算结果
+  double result;
+  //标记是否等待一个操作数
+  bool waitForOperand;
+
+  bool isFinished;
+
+private slots:
+  void on_clearBtn_clicked();
+
+  void on_clearAllBtn_clicked();
+
+  void on_equalBtn_clicked();
+
+  void digitClicked();
+
+  void operatorClicked();
+};
+#endif // MAINWINDOW_H

SoftwareDesign/Lab2/Lab2-3_Calculator4490_v3/mainwindow.ui

@@ -0,0 +1,180 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<ui version="4.0">
+ <class>MainWindow</class>
+ <widget class="QMainWindow" name="MainWindow">
+  <property name="geometry">
+   <rect>
+    <x>0</x>
+    <y>0</y>
+    <width>405</width>
+    <height>320</height>
+   </rect>
+  </property>
+  <property name="windowTitle">
+   <string>Calculator_v3_4490</string>
+  </property>
+  <property name="toolButtonStyle">
+   <enum>Qt::ToolButtonTextOnly</enum>
+  </property>
+  <widget class="QWidget" name="centralwidget">
+   <layout class="QGridLayout" name="gridLayout">
+    <item row="3" column="1">
+     <widget class="QPushButton" name="digitBtn5">
+      <property name="text">
+       <string>5</string>
+      </property>
+     </widget>
+    </item>
+    <item row="5" column="3">
+     <widget class="QPushButton" name="divisionBtn">
+      <property name="text">
+       <string>/</string>
+      </property>
+     </widget>
+    </item>
+    <item row="2" column="2">
+     <widget class="QPushButton" name="digitBtn3">
+      <property name="text">
+       <string>3</string>
+      </property>
+     </widget>
+    </item>
+    <item row="3" column="0">
+     <widget class="QPushButton" name="digitBtn4">
+      <property name="text">
+       <string>4</string>
+      </property>
+     </widget>
+    </item>
+    <item row="4" column="3">
+     <widget class="QPushButton" name="mulBtn">
+      <property name="text">
+       <string>*</string>
+      </property>
+     </widget>
+    </item>
+    <item row="2" column="1">
+     <widget class="QPushButton" name="digitBtn2">
+      <property name="text">
+       <string>2</string>
+      </property>
+     </widget>
+    </item>
+    <item row="1" column="0">
+     <widget class="QPushButton" name="clearBtn">
+      <property name="text">
+       <string>Back</string>
+      </property>
+     </widget>
+    </item>
+    <item row="1" column="1">
+     <widget class="QPushButton" name="clearAllBtn">
+      <property name="text">
+       <string>ClearAll</string>
+      </property>
+     </widget>
+    </item>
+    <item row="5" column="0">
+     <widget class="QPushButton" name="pointBtn">
+      <property name="text">
+       <string>.</string>
+      </property>
+     </widget>
+    </item>
+    <item row="5" column="1">
+     <widget class="QPushButton" name="digitBtn0">
+      <property name="text">
+       <string>0</string>
+      </property>
+     </widget>
+    </item>
+    <item row="1" column="2" colspan="2">
+     <widget class="QPushButton" name="equalBtn">
+      <property name="text">
+       <string>=</string>
+      </property>
+     </widget>
+    </item>
+    <item row="2" column="0">
+     <widget class="QPushButton" name="digitBtn1">
+      <property name="text">
+       <string>1</string>
+      </property>
+     </widget>
+    </item>
+    <item row="3" column="2">
+     <widget class="QPushButton" name="digitBtn6">
+      <property name="text">
+       <string>6</string>
+      </property>
+     </widget>
+    </item>
+    <item row="3" column="3">
+     <widget class="QPushButton" name="subtractionBtn">
+      <property name="text">
+       <string>-</string>
+      </property>
+     </widget>
+    </item>
+    <item row="4" column="0">
+     <widget class="QPushButton" name="digitBtn7">
+      <property name="text">
+       <string>7</string>
+      </property>
+     </widget>
+    </item>
+    <item row="0" column="0" colspan="4">
+     <widget class="QLineEdit" name="lineEdit">
+      <property name="alignment">
+       <set>Qt::AlignRight|Qt::AlignTrailing|Qt::AlignVCenter</set>
+      </property>
+      <property name="readOnly">
+       <bool>true</bool>
+      </property>
+     </widget>
+    </item>
+    <item row="4" column="1">
+     <widget class="QPushButton" name="digitBtn8">
+      <property name="text">
+       <string>8</string>
+      </property>
+     </widget>
+    </item>
+    <item row="4" column="2">
+     <widget class="QPushButton" name="digitBtn9">
+      <property name="text">
+       <string>9</string>
+      </property>
+     </widget>
+    </item>
+    <item row="2" column="3">
+     <widget class="QPushButton" name="addBtn">
+      <property name="text">
+       <string>+</string>
+      </property>
+     </widget>
+    </item>
+    <item row="5" column="2">
+     <widget class="QPushButton" name="squareBtn">
+      <property name="text">
+       <string>^</string>
+      </property>
+     </widget>
+    </item>
+   </layout>
+  </widget>
+  <widget class="QMenuBar" name="menubar">
+   <property name="geometry">
+    <rect>
+     <x>0</x>
+     <y>0</y>
+     <width>405</width>
+     <height>30</height>
+    </rect>
+   </property>
+  </widget>
+  <widget class="QStatusBar" name="statusbar"/>
+ </widget>
+ <resources/>
+ <connections/>
+</ui>

SoftwareDesign/Lab2/lab2-3-5_KeyEvent/lab2-3-5_KeyEvent.pro

@@ -0,0 +1,24 @@
+QT       += core gui
+
+greaterThan(QT_MAJOR_VERSION, 4): QT += widgets
+
+CONFIG += c++17
+
+# You can make your code fail to compile if it uses deprecated APIs.
+# In order to do so, uncomment the following line.
+#DEFINES += QT_DISABLE_DEPRECATED_BEFORE=0x060000    # disables all the APIs deprecated before Qt 6.0.0
+
+SOURCES += \
+    main.cpp \
+    mainwindow.cpp
+
+HEADERS += \
+    mainwindow.h
+
+FORMS += \
+    mainwindow.ui
+
+# Default rules for deployment.
+qnx: target.path = /tmp/$${TARGET}/bin
+else: unix:!android: target.path = /opt/$${TARGET}/bin
+!isEmpty(target.path): INSTALLS += target

SoftwareDesign/Lab2/lab2-3-5_KeyEvent/main.cpp

@@ -0,0 +1,11 @@
+#include "mainwindow.h"
+
+#include <QApplication>
+
+int main(int argc, char *argv[])
+{
+    QApplication a(argc, argv);
+    MainWindow w;
+    w.show();
+    return a.exec();
+}

SoftwareDesign/Lab2/lab2-3-5_KeyEvent/mainwindow.cpp

@@ -0,0 +1,32 @@
+#include "mainwindow.h"
+#include "ui_mainwindow.h"
+
+MainWindow::MainWindow(QWidget *parent)
+    : QMainWindow(parent), ui(new Ui::MainWindow) {
+  ui->setupUi(this);
+}
+
+MainWindow::~MainWindow() { delete ui; }
+
+void MainWindow::keyPressEvent(QKeyEvent *event) {
+  if (event->key() == Qt::Key_Up) {
+    ui->l->move(ui->l->pos().x(), ui->l->pos().y() - 20);
+  } else if (event->key() == Qt::Key_Down) {
+    ui->l->move(ui->l->pos().x(), ui->l->pos().y() + 20);
+  } else if (event->key() == Qt::Key_Left) {
+    ui->l->move(ui->l->pos().x() - 20, ui->l->pos().y());
+  } else if (event->key() == Qt::Key_Right) {
+    ui->l->move(ui->l->pos().x() + 20, ui->l->pos().y());
+  }
+}
+void MainWindow::keyReleaseEvent(QKeyEvent *e) {
+  if (e->key() == Qt::Key_Up) {
+    ui->l->move(ui->l->pos().x(), ui->l->pos().y() + 20);
+  } else if (e->key() == Qt::Key_Down) {
+    ui->l->move(ui->l->pos().x(), ui->l->pos().y() - 20);
+  } else if (e->key() == Qt::Key_Left) {
+    ui->l->move(ui->l->pos().x() + 20, ui->l->pos().y());
+  } else if (e->key() == Qt::Key_Right) {
+    ui->l->move(ui->l->pos().x() - 20, ui->l->pos().y());
+  }
+}

SoftwareDesign/Lab2/lab2-3-5_KeyEvent/mainwindow.h

@@ -1,10 +1,8 @@
 #ifndef MAINWINDOW_H
 #define MAINWINDOW_H
 
+#include <QKeyEvent>
 #include <QMainWindow>
-#include <QWheelEvent>
-#include <QMouseEvent>
-
 QT_BEGIN_NAMESPACE
 namespace Ui {
 class MainWindow;
@@ -20,8 +18,7 @@ public:
 
 private:
   Ui::MainWindow *ui;
-
-protected:
-  void mouseEvent(QMouseEvent *e);
+  void keyPressEvent(QKeyEvent *e);
+  void keyReleaseEvent(QKeyEvent *e);
 };
 #endif // MAINWINDOW_H

SoftwareDesign/Lab2/lab2-3-5_KeyEvent/mainwindow.ui

@@ -0,0 +1,45 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<ui version="4.0">
+ <class>MainWindow</class>
+ <widget class="QMainWindow" name="MainWindow">
+  <property name="geometry">
+   <rect>
+    <x>0</x>
+    <y>0</y>
+    <width>800</width>
+    <height>600</height>
+   </rect>
+  </property>
+  <property name="windowTitle">
+   <string>MainWindow</string>
+  </property>
+  <widget class="QWidget" name="centralwidget">
+   <widget class="QLabel" name="l">
+    <property name="geometry">
+     <rect>
+      <x>240</x>
+      <y>200</y>
+      <width>77</width>
+      <height>25</height>
+     </rect>
+    </property>
+    <property name="text">
+     <string>TextLabel</string>
+    </property>
+   </widget>
+  </widget>
+  <widget class="QMenuBar" name="menubar">
+   <property name="geometry">
+    <rect>
+     <x>0</x>
+     <y>0</y>
+     <width>800</width>
+     <height>30</height>
+    </rect>
+   </property>
+  </widget>
+  <widget class="QStatusBar" name="statusbar"/>
+ </widget>
+ <resources/>
+ <connections/>
+</ui>