15 lines
650 B
Text
15 lines
650 B
Text
/home/ir/Documents/codelib/Quartus/v6/jyh_4490_6_testbench.v {1 {vlog -work work -stats=none /home/ir/Documents/codelib/Quartus/v6/jyh_4490_6_testbench.v
|
|
Model Technology ModelSim - Intel FPGA Edition vlog 2020.1 Compiler 2020.02 Feb 28 2020
|
|
-- Compiling module jyh_4490_6_testbench
|
|
|
|
Top level modules:
|
|
jyh_4490_6_testbench
|
|
|
|
} {} {}} /home/ir/Documents/codelib/Quartus/v6/jyh_4490_mstate.v {1 {vlog -work work -stats=none /home/ir/Documents/codelib/Quartus/v6/jyh_4490_mstate.v
|
|
Model Technology ModelSim - Intel FPGA Edition vlog 2020.1 Compiler 2020.02 Feb 28 2020
|
|
-- Compiling module jyh_4490_mstate
|
|
|
|
Top level modules:
|
|
jyh_4490_mstate
|
|
|
|
} {} {}}
|