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justhomework/Quartus/Design/uart_screen/synthesis/submodules
2022-06-25 12:47:20 +08:00
..
altera_reset_controller.sdc 暂且不知道这堆东西能不能用 2022-05-28 00:35:55 +08:00
altera_reset_controller.v 暂且不知道这堆东西能不能用 2022-05-28 00:35:55 +08:00
altera_reset_synchronizer.v 暂且不知道这堆东西能不能用 2022-05-28 00:35:55 +08:00
altera_up_rs232_counters.v 暂且不知道这堆东西能不能用 2022-05-28 00:35:55 +08:00
altera_up_rs232_in_deserializer.v 暂且不知道这堆东西能不能用 2022-05-28 00:35:55 +08:00
altera_up_rs232_out_serializer.v 暂且不知道这堆东西能不能用 2022-05-28 00:35:55 +08:00
altera_up_sync_fifo.v 暂且不知道这堆东西能不能用 2022-05-28 00:35:55 +08:00
uart_screen_rs232_0.v feat(数电课设): 搭框架 2022-06-25 12:47:20 +08:00