15 lines
662 B
Text
15 lines
662 B
Text
/home/ir/Documents/codelib/Quartus/v5/jyh_4490_5_divider.v {1 {vlog -work work -stats=none /home/ir/Documents/codelib/Quartus/v5/jyh_4490_5_divider.v
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Model Technology ModelSim - Intel FPGA Edition vlog 2020.1 Compiler 2020.02 Feb 28 2020
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-- Compiling module jyh_4490_5_divider
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Top level modules:
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jyh_4490_5_divider
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} {} {}} /home/ir/Documents/codelib/Quartus/v5/jyh_4490_5_testbench.v {1 {vlog -work work -stats=none /home/ir/Documents/codelib/Quartus/v5/jyh_4490_5_testbench.v
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Model Technology ModelSim - Intel FPGA Edition vlog 2020.1 Compiler 2020.02 Feb 28 2020
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-- Compiling module jyh_4490_5_testbench
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Top level modules:
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jyh_4490_5_testbench
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} {} {}}
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