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justhomework/Quartus/v5_testbench/jyh_4490_5_testbench.cr.mti
2022-04-19 22:26:41 +08:00

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/home/ir/Documents/codelib/Quartus/v5/jyh_4490_5_divider.v {1 {vlog -work work -stats=none /home/ir/Documents/codelib/Quartus/v5/jyh_4490_5_divider.v
Model Technology ModelSim - Intel FPGA Edition vlog 2020.1 Compiler 2020.02 Feb 28 2020
-- Compiling module jyh_4490_5_divider
Top level modules:
jyh_4490_5_divider
} {} {}} /home/ir/Documents/codelib/Quartus/v5/jyh_4490_5_testbench.v {1 {vlog -work work -stats=none /home/ir/Documents/codelib/Quartus/v5/jyh_4490_5_testbench.v
Model Technology ModelSim - Intel FPGA Edition vlog 2020.1 Compiler 2020.02 Feb 28 2020
-- Compiling module jyh_4490_5_testbench
Top level modules:
jyh_4490_5_testbench
} {} {}}